From basic gates to flip-flops — everything you need to master digital circuit design.
Digital logic is the foundational concept behind all modern computational devices, from simple calculators to advanced supercomputers. It is the mathematical framework based on Boolean algebra that allows electronic circuits to process binary information—ones and zeros, representing high and low voltages.
At its core, digital logic involves using microscopic electronic switches (transistors) arranged into "gates." These gates perform basic logical operations like AND, OR, and NOT. By combining thousands or millions of these simple building blocks, engineers create combinational circuits (like adders and multiplexers) for processing data, and sequential circuits (like flip-flops and registers) for storing memory.
Understanding digital logic is essential for anyone interested in computer science, computer engineering, or electronics. It bridges the gap between hardware and software, revealing exactly how a computer thinks and processes information at the physical level.
Logic gates are the basic building blocks of any digital system. Here is a comprehensive reference to the standard logic gates, their symbols, truth tables, and Boolean expressions.
The AND gate outputs a high signal (1) only if all of its inputs are high. Otherwise, it outputs a low signal (0).
| A | B | Output |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
The OR gate outputs a high signal (1) if any of its inputs are high. It outputs a low signal (0) only if all inputs are low.
| A | B | Output |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
The NOT gate, or inverter, simply reverses the input state. If the input is high (1), the output is low (0), and vice versa.
| A | Output |
|---|---|
| 0 | 1 |
| 1 | 0 |
The NAND gate is a universal gate. It behaves exactly opposite to the AND gate. It outputs low (0) only if all inputs are high (1).
| A | B | Output |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
The NOR gate is also universal. It behaves oppositely to the OR gate. It outputs high (1) only if all inputs are low (0).
| A | B | Output |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
The Exclusive-OR (XOR) gate outputs high (1) only when its inputs are different. It is widely used in arithmetic circuits.
| A | B | Output |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
The Exclusive-NOR (XNOR) gate outputs high (1) only when its inputs are identical. It acts as an equality comparator.
| A | B | Output |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
A buffer outputs exactly what is input into it. It doesn't change the logic state but is used to amplify signals or add delay.
| A | Output |
|---|---|
| 0 | 0 |
| 1 | 1 |
Boolean algebra uses rules to simplify logical expressions, which helps in reducing the number of gates needed in a digital circuit.
Combinational logic circuits have outputs that depend exclusively on their current inputs. They possess no memory. Common examples include adders, decoders, and multiplexers.
A half adder is a combinational circuit that adds two single binary digits (A and B). It produces two outputs: a sum (S) and a carry (C). While fundamental, it cannot accept a carry-in from a previous addition stage.
| A | B | Sum (S) | Carry (C) |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
A full adder expands on the half adder by accommodating a carry-in (Cin) bit from a previous addition. It adds three bits (A, B, Cin) and produces a Sum and a Carry-out, enabling the chaining of adders to compute multi-bit numbers.
| A | B | Cin | Sum | Cout |
|---|---|---|---|---|
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
| ...and so on | ||||
A multiplexer (MUX) is a digital switch. A 2:1 MUX takes two data inputs (I0, I1) and a single select line (S). Based on the select line's state, it routes one of the inputs to the output. It acts as a data selector.
| S | Output (Y) |
|---|---|
| 0 | I0 |
| 1 | I1 |
A decoder transforms binary information from 'n' input lines to a maximum of 2^n unique output lines. A 2-to-4 decoder takes a 2-bit input and activates exactly one of its four outputs corresponding to the binary value of the input.
| A1 | A0 | Y0 | Y1 | Y2 | Y3 |
|---|---|---|---|---|---|
| 0 | 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 | 0 | 0 |
| 1 | 0 | 0 | 0 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 | 1 |
Unlike combinational circuits, sequential circuits have memory. Their output depends on both current inputs and the previous state. Flip-flops are the fundamental memory elements.
The Set-Reset (SR) flip-flop is the simplest memory unit. It has Set and Reset inputs. When S is 1, it stores a 1. When R is 1, it stores a 0. The state where both S and R are 1 is generally invalid or unpredictable.
| S | R | Q(next) | State |
|---|---|---|---|
| 0 | 0 | Q(prev) | Hold |
| 0 | 1 | 0 | Reset |
| 1 | 0 | 1 | Set |
| 1 | 1 | ? | Invalid |
The Data (D) flip-flop eliminates the invalid state of the SR flip-flop. It simply captures the value of the D input at a specific portion of the clock cycle (e.g., rising edge) and holds it until the next cycle. It's widely used in registers.
| Clock | D | Q(next) |
|---|---|---|
| ↑ | 0 | 0 |
| ↑ | 1 | 1 |
| 0/1 | X | Q(prev) |
The JK flip-flop improves upon the SR flip-flop by making the J=1, K=1 condition valid. When both inputs are 1, it toggles its current state. It is highly versatile and forms the basis for many counter circuits.
| J | K | Q(next) | State |
|---|---|---|---|
| 0 | 0 | Q(prev) | Hold |
| 0 | 1 | 0 | Reset |
| 1 | 0 | 1 | Set |
| 1 | 1 | Q(prev)' | Toggle |
The Toggle (T) flip-flop changes its state only when the T input is 1. If T is 0, it holds its state. It is primarily built from a JK flip-flop with tied inputs and is used extensively in binary counters and frequency dividers.
| T | Q(next) | State |
|---|---|---|
| 0 | Q(prev) | Hold |
| 1 | Q(prev)' | Toggle |
A Karnaugh Map (K-Map) is a visual tool used to simplify Boolean algebra expressions without using complex theorems. By arranging truth table outputs in a grid based on Gray code, K-Maps allow you to identify overlapping groups of 1s (or 0s), leading directly to a minimized logic circuit.
F(A,B,C) layout
| A \ BC | 00 | 01 | 11 | 10 |
|---|---|---|---|---|
| 0 | m0 | m1 | m3 | m2 |
| 1 | m4 | m5 | m7 | m6 |